Literature Review Metode Reduksi Harmonisa Berbasis Kecerdasan Buatan pada Multilevel Inverter
Abstract
Multilevel inverter (MLI) is one type of inverter that has a multilevel output voltage. Although its better than conventional inverters, the MLIs operating at low frequency still contains low-order harmonics at the output voltage and current which have a negative impact on electrical system. To overcome these problems, Many researchers have developed various control and modulation techniques on inverters to reduce harmonics and minimize switching losses with the aim of optimizing inverter’s efficiency. Selective harmonic elimination pulse-width modulation (SHEPWM) is the most optimal control of all methods that have been developed to remove low-order harmonics from the inverter output voltage. However, there are challenges in the MLIs analysis process using SHEPWM because solving these equations is difficult. Bio-inspired intelligent algorithms (BIAs) is used to solve this problem. This paper describes in full a review of various studies that have been carried out previously related to the operating principle of nine types of BIA and their application in reducing harmonics. The conclusions has been made on the basis of information extracted from the literatures. All important information in this paper regarding harmonic reduction in MLI will help future research to design efficient power conversion systems.
Keywords— Bio-inspired algorithm, harmonics, multilevel inverter, optimization, selective harmonic elimination.
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References
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[12] M. A. Memon, S. Mekhilef, M. Mubin, and M. Aamir, “Selective harmonic elimination in inverters using bio-inspired intelligent algorithms for renewable energy conversion applications: A review,” Renew. Sustain. Energy Rev., vol. 82, no. February, pp. 2235–2253, 2018, doi: 10.1016/j.rser.2017.08.068.
[13] A. D. Roy and C. Umayal, “A review of various multilevel inverter topologies with reduced component count,” Proc. IEEE Int. Conf. "Recent Trends Electr. Control Commun. RTECC 2018, pp. 234–239, 2019, doi: 10.1109/RTECC.2018.8625691.
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[16] M. Zolfaghar, E. Najafi, and S. Hasanzadeh, “A modified diode clamped inverter with reduced number of switches,” in 9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018, 2018, vol. 2018-Janua, pp. 53–58, doi: 10.1109/PEDSTC.2018.8343771.
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[18] J. N. Bhanutej, C. Rani, A. Tamilmaran, J. Santhosh, Y. Wang, and K. Busawon, “Different Multilevel Inverter Topologies and Control Schemes for Renewable Energy Conversions: A Review,” in 7th IEEE International Conference on Computation of Power, Energy, Information and Communication, ICCPEIC 2018, 2018, pp. 286–295, doi: 10.1109/ICCPEIC.2018.8525201.
[19] A. K. Koshti and M. N. Rao, “A brief review on multilevel inverter topologies,” 2017 Int. Conf. Data Manag. Anal. Innov. ICDMAI 2017, no. October, pp. 187–193, 2017, doi: 10.1109/ICDMAI.2017.8073508.
[20] M. M. Shobini, J. Kamala, and R. Rathna, “Analysis and simulation of flying capacitor multilevel inverter using PDPWM strategy,” IEEE Int. Conf. Innov. Mech. Ind. Appl. ICIMIA 2017 - Proc., no. Icimia, pp. 91–95, 2017, doi: 10.1109/ICIMIA.2017.7975578.
[21] M. M. Da Silva and H. Pinheiro, “Voltage balancing in flying capacitor converter multilevel using space vector modulation,” 2017 IEEE 8th Int. Symp. Power Electron. Distrib. Gener. Syst. PEDG 2017, 2017, doi: 10.1109/PEDG.2017.7972477.
[22] A. Tumurbaatar, S. Mochidate, K. Yamaguchi, T. Matsuda, and Y. Sato, “Harmonic Loss Reduction in High Speed Motor Drive Systems by Flying Capacitor Multilevel Inverter,” 2018 Int. Power Electron. Conf. IPEC-Niigata - ECCE Asia 2018, pp. 1972–1976, 2018, doi: 10.23919/IPEC.2018.8507940.
[23] M. Pamujula, A. Ohja, R. D. Kulkarni, and P. Swarnkar, “Cascaded ‘H’ bridge based multilevel inverter topologies: A review,” in 2020 International Conference for Emerging Technology, INCET 2020, 2020, pp. 4–10, doi: 10.1109/INCET49848.2020.9154031.
[24] D. Narsale and S. S. Dhamse, “A Review on Different Multilevel Topology Used in AC Drives to Mitigates the Total Harmonic Distortion,” 7th IEEE Int. Conf. Comput. Power, Energy, Inf. Commun. ICCPEIC 2018, pp. 230–236, 2018, doi: 10.1109/ICCPEIC.2018.8525178.
[25] S. N. Dehedkar and A. G. Thosar, “Simulation of Single Phase Cascaded H-Bridge Multilevel Inverters & THD analysis,” in 2018 International Conference on Emerging Trends and Innovations In Engineering And Technological Research (ICETIETR), 2018, pp. 1–6.
[26] A. Anan, “A Single-Phase Cascaded H-Bridge Multilevel Inverter with Reduced Switching Devices and Harmonics,” in 2018 IEEE International Conference on Smart Energy Grid Engineering (SEGE), 2018, pp. 222–225.
[27] O. V Nos, P. N. Smirnov, and E. E. Abramushkina, “The Capacitor Voltage Balancing of Cascaded H-bridge Multilevel Inverter,” in 2019 IEEE International Conference on Mechatronics (ICM), 2019, vol. 1, pp. 327–331.
[28] N. Yadav, “Analysis and Integration of Nine Level Cascaded H- Bridge Multilevel Inverter Configuration in a Photovoltaic System,” in 2018 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2018, pp. 1–7.
[29] E. H. E. Aboadla, K. A. Aznan, M. Tohtayong, S. Khan, M. A. Hannan, and M. N. Uddin, “Low Spikes and Low Harmonic Distortion Multilevel Inverter for Induction Motor Implementation,” 2017, pp. 1–7.
[30] A. Anand, A. V. B, N. Raj, G. Jagadanand, and S. George, “An Open Switch Fault Detection Strategy using Mean Voltage Prediction for Cascaded H-Bridge Multilevel Inverters,” 2018 IEEE Int. Conf. Power Electron. Drives Energy Syst., pp. 1–5, 2018, doi: 10.1109/PEDES.2018.8707768.
[31] A. Chatterjee, A. Rastogi, R. Rastogi, A. Saini, and S. K. Sahoo, “Selective Harmonic Elimination of Cascaded H-Bridge Multilevel Inverter using Genetic Algorithm,” pp. 1–4, 2017.
[32] L. P. S. R, O. A. Q, Z. Arief, and N. A. Windarko, “Reduction of Total Harmonic Distortion ( THD ) on Multilevel Inverter with Modified PWM using Genetic Algorithm,” vol. 5, no. 1, pp. 91–118, 2017.
[33] N. El and H. Gabour, “Enhanced Harmonic Elimination Using Genetic Algorithm Optimization in Multilevel Inverters,” 2021, pp. 323–329.
[34] G. Ghosh, “Optimum Switching Angles For Multilevel SHE-PWM Inverter Using Genetic Algorithm,” vol. 1, 2020.
[35] K. M. Kotb, A. E. Hassan, and E. M. Rashad, “Implementation of Genetic Algorithm-Based SHE for a Cascaded Half-Bridge Multilevel Inverter Fed from PV Modules,” pp. 3–8, 2017.
[36] M. Ali, M. Tariq, and K. A. Lodi, “Differential evolution based selective harmonic elimination of a new WE Type 13-level inverter,” in 9th IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2020, 2020, pp. 13–18, doi: 10.1109/PEDES49360.2020.9379576.
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Published
2022-07-08
How to Cite
PATRIANAYA MARGAYASA WIRSUYANA, Gede et al.
Literature Review Metode Reduksi Harmonisa Berbasis Kecerdasan Buatan pada Multilevel Inverter.
Majalah Ilmiah Teknologi Elektro, [S.l.], v. 21, n. 1, p. 53-62, july 2022.
ISSN 2503-2372.
Available at: <https://ojs.unud.ac.id/index.php/mite/article/view/80947>. Date accessed: 19 nov. 2024.
doi: https://doi.org/10.24843/MITE.2022.v21i01.P08.
Section
Articles
This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.
This work is licensed under a Creative Commons Attribution 4.0 International License
