Literature Review Metode Reduksi Harmonisa Berbasis Kecerdasan Buatan pada Multilevel Inverter

  • Gede Patrianaya Margayasa Wirsuyana Universitas Udayana
  • Linawati Linawati Universitas Udayana
  • Ida Bagus Gede Manuaba Universitas Udayana
  • Rukmi Sari Hartati Universitas Udayana


Multilevel inverter (MLI) is one type of inverter that has a multilevel output voltage. Although its better than conventional inverters, the MLIs operating at low frequency still contains low-order harmonics at the output voltage and current which have a negative impact on electrical system. To overcome these problems, Many researchers have developed various control and modulation techniques on inverters to reduce harmonics and minimize switching losses with the aim of optimizing inverter’s efficiency. Selective harmonic elimination pulse-width modulation (SHEPWM) is the most optimal control of all methods that have been developed to remove low-order harmonics from the inverter output voltage. However, there are challenges in the MLIs analysis process using SHEPWM because solving these equations is difficult. Bio-inspired intelligent algorithms (BIAs) is used to solve this problem. This paper describes in full a review of various studies that have been carried out previously related to the operating principle of nine types of BIA and their application in reducing harmonics. The conclusions has been made on the basis of information extracted from the literatures. All important information in this paper regarding harmonic reduction in MLI will help future research to design efficient power conversion systems.

Keywords— Bio-inspired algorithm, harmonics, multilevel inverter, optimization, selective harmonic elimination.


Download data is not yet available.


[1] R. I. Putri, F. Maulana, and H. Haryadi, “Desain Inverter Full-Bridge 1 Fasa dengan DSP F28069M Menggunakan Teknik SPWM,” Maj. Ilm. Teknol. Elektro, vol. 20, no. 2, p. 257, 2021.
[2] E. F. Firmansyah, O. A. Qudsi, M. N. Habibi, and N. A. Windarko, “Optimized Modified PWM based on Differential Evolution for Reducing THD on Multilevel Inverter,” in Proceedings - 2020 International Seminar on Intelligent Technology and Its Application: Humanification of Reliable Intelligent Systems, ISITIA 2020, 2020, pp. 113–118, doi: 10.1109/ISITIA49792.2020.9163729.
[3] K. Haghdar, “Optimal DC Source Influence on Selective Harmonic Elimination in Multilevel Inverters Using Teaching-Learning-Based Optimization,” IEEE Trans. Ind. Electron., vol. 67, no. 2, pp. 942–949, Feb. 2020, doi: 10.1109/TIE.2019.2901657.
[4] R. A. Rana, S. A. Patel, A. Muthusamy, C. W. Lee, and H. J. Kim, “Review of multilevel voltage source inverter topologies and analysis of harmonics distortions in FC-MLI,” Electron., vol. 8, no. 11, 2019, doi: 10.3390/electronics8111329.
[5] A. K. Koshti and M. N. Rao, “A brief review on multilevel inverter topologies,” in 2017 International Conference on Data Management, Analytics and Innovation, ICDMAI 2017, 2017, pp. 187–193, doi: 10.1109/ICDMAI.2017.8073508.
[6] A. Prayag and S. Bodkhe, “A comparative analysis of classical three phase multilevel (five level) inverter topologies,” in 1st IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems, ICPEICES 2016, 2017, pp. 1–5, doi: 10.1109/ICPEICES.2016.7853567.
[7] S. B G, C. Srikanth, and V. Yatnalli, “Review on Multi Level Inverter Topologies and Control Strategies for Solar Power Conversion,” Emit. Int. J. Eng. Technol., vol. 8, no. 2, pp. 295–315, 2020, doi: 10.24003/emitter.v8i2.500.
[8] B. Ganesh Babu and M. Surya Kalavathi, “Hardware Implementation of Multilevel Inverter using NR, GA, Bee Algorithms,” Jan. 2021, doi: 10.1109/SeFet48154.2021.9375750.
[9] Noorul Islam Centre for Higher Education. Department of Electrical and Electronics Engineering, IEEE Electron Devices Society. India Chapter, and Institute of Electrical and Electronics Engineers, “Proceedings of IEEE International Conference on Circuits, Power and Computing Technologies : ICCPCT-2016 on 18th & 19th March 2016,” 2016.
[10] M. D. Nugraha, I. B. G. I. B. G. Manuaba, and R. S. Hartati, “Simulasi Filter Aktif pada 6 Pulse STATCOM Untuk Mereduksi Total Harmonic Distortion (THD) Di Sistem Transmisi Bali,” Maj. Ilm. Teknol. Elektro, vol. 18, no. 2, p. 11, 2019.
[11] Z. Boussada, O. Elbeji, and M. Benhamed, “Different topologies and control techniques of multi level inverter: A literature survey,” in International Conference on Green Energy and Conversion Systems, GECS 2017, 2017, pp. 3–7, doi: 10.1109/GECS.2017.8066187.
[12] M. A. Memon, S. Mekhilef, M. Mubin, and M. Aamir, “Selective harmonic elimination in inverters using bio-inspired intelligent algorithms for renewable energy conversion applications: A review,” Renew. Sustain. Energy Rev., vol. 82, no. February, pp. 2235–2253, 2018, doi: 10.1016/j.rser.2017.08.068.
[13] A. D. Roy and C. Umayal, “A review of various multilevel inverter topologies with reduced component count,” Proc. IEEE Int. Conf. "Recent Trends Electr. Control Commun. RTECC 2018, pp. 234–239, 2019, doi: 10.1109/RTECC.2018.8625691.
[14] A. El-Hosainy, H. A. Hamed, H. Z. Azazi, and E. E. El-Kholy, “A review of multilevel inverter topologies, control techniques, and applications,” 2017 19th Int. Middle-East Power Syst. Conf. MEPCON 2017 - Proc., vol. 2018-Febru, no. December, pp. 1265–1275, 2018, doi: 10.1109/MEPCON.2017.8301344.
[15] Z. Boussada, O. Elbeji, and M. Benhamed, “Modeling of diode clamped inverter using SPWM technique,” in International Conference on Green Energy and Conversion Systems, GECS 2017, 2017, pp. 0–4, doi: 10.1109/GECS.2017.8066210.
[16] M. Zolfaghar, E. Najafi, and S. Hasanzadeh, “A modified diode clamped inverter with reduced number of switches,” in 9th Annual International Power Electronics, Drive Systems, and Technologies Conference, PEDSTC 2018, 2018, vol. 2018-Janua, pp. 53–58, doi: 10.1109/PEDSTC.2018.8343771.
[17] M. A. B. NUGROHO, N. A. WINDARKO, and B. SUMANTRI, “Perancangan Kendali Multilevel Inverter Satu Fasa Tiga Tingkat dengan PI+feedforward pada Beban Nonlinier,” ELKOMIKA J. Tek. Energi Elektr. Tek. Telekomun. Tek. Elektron., vol. 7, no. 3, p. 493, 2019, doi: 10.26760/elkomika.v7i3.493.
[18] J. N. Bhanutej, C. Rani, A. Tamilmaran, J. Santhosh, Y. Wang, and K. Busawon, “Different Multilevel Inverter Topologies and Control Schemes for Renewable Energy Conversions: A Review,” in 7th IEEE International Conference on Computation of Power, Energy, Information and Communication, ICCPEIC 2018, 2018, pp. 286–295, doi: 10.1109/ICCPEIC.2018.8525201.
[19] A. K. Koshti and M. N. Rao, “A brief review on multilevel inverter topologies,” 2017 Int. Conf. Data Manag. Anal. Innov. ICDMAI 2017, no. October, pp. 187–193, 2017, doi: 10.1109/ICDMAI.2017.8073508.
[20] M. M. Shobini, J. Kamala, and R. Rathna, “Analysis and simulation of flying capacitor multilevel inverter using PDPWM strategy,” IEEE Int. Conf. Innov. Mech. Ind. Appl. ICIMIA 2017 - Proc., no. Icimia, pp. 91–95, 2017, doi: 10.1109/ICIMIA.2017.7975578.
[21] M. M. Da Silva and H. Pinheiro, “Voltage balancing in flying capacitor converter multilevel using space vector modulation,” 2017 IEEE 8th Int. Symp. Power Electron. Distrib. Gener. Syst. PEDG 2017, 2017, doi: 10.1109/PEDG.2017.7972477.
[22] A. Tumurbaatar, S. Mochidate, K. Yamaguchi, T. Matsuda, and Y. Sato, “Harmonic Loss Reduction in High Speed Motor Drive Systems by Flying Capacitor Multilevel Inverter,” 2018 Int. Power Electron. Conf. IPEC-Niigata - ECCE Asia 2018, pp. 1972–1976, 2018, doi: 10.23919/IPEC.2018.8507940.
[23] M. Pamujula, A. Ohja, R. D. Kulkarni, and P. Swarnkar, “Cascaded ‘H’ bridge based multilevel inverter topologies: A review,” in 2020 International Conference for Emerging Technology, INCET 2020, 2020, pp. 4–10, doi: 10.1109/INCET49848.2020.9154031.
[24] D. Narsale and S. S. Dhamse, “A Review on Different Multilevel Topology Used in AC Drives to Mitigates the Total Harmonic Distortion,” 7th IEEE Int. Conf. Comput. Power, Energy, Inf. Commun. ICCPEIC 2018, pp. 230–236, 2018, doi: 10.1109/ICCPEIC.2018.8525178.
[25] S. N. Dehedkar and A. G. Thosar, “Simulation of Single Phase Cascaded H-Bridge Multilevel Inverters & THD analysis,” in 2018 International Conference on Emerging Trends and Innovations In Engineering And Technological Research (ICETIETR), 2018, pp. 1–6.
[26] A. Anan, “A Single-Phase Cascaded H-Bridge Multilevel Inverter with Reduced Switching Devices and Harmonics,” in 2018 IEEE International Conference on Smart Energy Grid Engineering (SEGE), 2018, pp. 222–225.
[27] O. V Nos, P. N. Smirnov, and E. E. Abramushkina, “The Capacitor Voltage Balancing of Cascaded H-bridge Multilevel Inverter,” in 2019 IEEE International Conference on Mechatronics (ICM), 2019, vol. 1, pp. 327–331.
[28] N. Yadav, “Analysis and Integration of Nine Level Cascaded H- Bridge Multilevel Inverter Configuration in a Photovoltaic System,” in 2018 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT), 2018, pp. 1–7.
[29] E. H. E. Aboadla, K. A. Aznan, M. Tohtayong, S. Khan, M. A. Hannan, and M. N. Uddin, “Low Spikes and Low Harmonic Distortion Multilevel Inverter for Induction Motor Implementation,” 2017, pp. 1–7.
[30] A. Anand, A. V. B, N. Raj, G. Jagadanand, and S. George, “An Open Switch Fault Detection Strategy using Mean Voltage Prediction for Cascaded H-Bridge Multilevel Inverters,” 2018 IEEE Int. Conf. Power Electron. Drives Energy Syst., pp. 1–5, 2018, doi: 10.1109/PEDES.2018.8707768.
[31] A. Chatterjee, A. Rastogi, R. Rastogi, A. Saini, and S. K. Sahoo, “Selective Harmonic Elimination of Cascaded H-Bridge Multilevel Inverter using Genetic Algorithm,” pp. 1–4, 2017.
[32] L. P. S. R, O. A. Q, Z. Arief, and N. A. Windarko, “Reduction of Total Harmonic Distortion ( THD ) on Multilevel Inverter with Modified PWM using Genetic Algorithm,” vol. 5, no. 1, pp. 91–118, 2017.
[33] N. El and H. Gabour, “Enhanced Harmonic Elimination Using Genetic Algorithm Optimization in Multilevel Inverters,” 2021, pp. 323–329.
[34] G. Ghosh, “Optimum Switching Angles For Multilevel SHE-PWM Inverter Using Genetic Algorithm,” vol. 1, 2020.
[35] K. M. Kotb, A. E. Hassan, and E. M. Rashad, “Implementation of Genetic Algorithm-Based SHE for a Cascaded Half-Bridge Multilevel Inverter Fed from PV Modules,” pp. 3–8, 2017.
[36] M. Ali, M. Tariq, and K. A. Lodi, “Differential evolution based selective harmonic elimination of a new WE Type 13-level inverter,” in 9th IEEE International Conference on Power Electronics, Drives and Energy Systems, PEDES 2020, 2020, pp. 13–18, doi: 10.1109/PEDES49360.2020.9379576.
[37] K. Imarazene, A. Ladjici, and E. M. Berkouk, “Optimized total harmonic distortion PWM in five level inverter with differential evolution approach,” 2019 8th Int. Conf. Syst. Control. ICSC 2019, pp. 189–193, 2019, doi: 10.1109/ICSC47195.2019.8950594.
[38] A. Jain and N. Maithil, “Diminution of harmonics in multilevel inverter using particle swarm optimization,” in IEEE International Conference on Information, Communication, Instrumentation and Control, ICICIC 2017, 2018, vol. 2018-Janua, pp. 1–8, doi: 10.1109/ICOMICON.2017.8279023.
[39] P. Kala and S. Arora, “Implementation of PSO based selective harmonic elimination technique in multilevel inverters,” in 2018 2nd IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems, ICPEICES 2018, 2018, pp. 605–610, doi: 10.1109/ICPEICES.2018.8897309.
[40] R. Omar, Nizam, M. Rasheed, and M. Sulaiman, “A Single Phase of Modified Multilevel Inverter using Particle Swarm Optimization (PSO) Algorithm,” in 2019 IEEE International Conference on Automatic Control and Intelligent Systems, I2CACIS 2019 - Proceedings, 2019, no. June, pp. 91–95, doi: 10.1109/I2CACIS.2019.8825092.
[41] M. Sadoughi, A. Zakerian, A. Pourdadashnia, and M. Farhadi-Kangarlu, “Selective Harmonic Elimination PWM for Cascaded H-bridge Multilevel Inverter with Wide Output Voltage Range Using PSO Algorithm,” in 2021 IEEE Texas Power and Energy Conference, TPEC 2021, 2021, pp. 5–10, doi: 10.1109/TPEC51183.2021.9384945.
[42] N. Janjamraj, S. Hiranvarodom, and V. Pirajnanchai, “Opimized Harmonic of 27-Level Inverter for Aircraft Application Using Particle Swarm Optimization,” in Proceedings of the 2019 International Conference on Power, Energy and Innovations, ICPEI 2019, 2019, no. Icpei, pp. 94–97, doi: 10.1109/ICPEI47862.2019.8945015.
[43] S. Ganapathy, M. B. Moses, and J. B. Banu, “An Improved Artificial Bee Colony Algorithm based Harmonic control for Multilevel Inverter,” Control Eng. Appl. Informatics, vol. 21, no. 4, pp. 59–70, 2019.
[44] S. Srinivasan, S. Muthubalaji, and G. Devadasu, “An Improved H-Bridge Multi Level Inverter Topology with Minimal Switches for Harmonic Reduction using Artificial Bee Colony Algorithm,” Int. J. Adv. Sci. Technol., vol. 29, no. 5, pp. 5031–5040, 2020.
[45] S. D. Patil, “Improved Control Strategy for Harmonic Mitigation in Multilevel Inverter,” in Proceedings of the Fifth International Conference on Intelligent Computing and Control System (ICICCS 2021), 2021, pp. 727–732.
[46] M. Babaei, “Selective Harmonic Elimination PWM Using Ant Colony Optimization,” in lCEE 2017, 2017, pp. 1054–1059.
[47] S. D. Patil, “Hybrid Optimization Approach Applied for Harmonic Reduction in Multilevel Inverter,” in 2020 First International COnference on Power, Control and Computing Technologies (ICPCCT), 2020, pp. 1–6.
[48] M. G. Sundari, M. Rajaram, and S. Balaraman, “Application of improved firefly algorithm for programmed PWM in,” Appl. Soft Comput. J., 2015, doi: 10.1016/j.asoc.2015.12.036.
[50] N. B. R.E.M.Belkacem, R.Benzid, “Multilevel inverter with optimal THD through the firefly algorithm,” Arch. Electr. Eng., vol. 66, no. 1, pp. 141–154, 2017, doi: 10.1515/aee-2017-0010.
[51] D. Singla and P. R. Sharma, “Implementation of Cuckoo Search Optimized Firing Scheme in 5-Level Cascaded H-Bridge Multilevel Inverter for Power Quality Improvement,” J. Power Electron., vol. 19, no. 6, pp. 1458–1466, 2019.
[52] D. Singla and P. R. Sharma, “OPTIMAL MINIMIZATION OF THD AND LOSS ANALYSIS IN MULTILEVEL INVERTER USING CUCKOO SEARCH ALGORITHM,” J. Emerg. Technol. Innov. Res., vol. 5, no. 8, pp. 1104–1110, 2018.
[53] S. Srinivasan, S. Muthubalaji, G. Devadasu, and R. Anand, “Bat Algorithm Based Selective Harmonic Elimination PWM for an Eleven Level Inverter,” Int. J. Recent Technol. Eng., vol. 8, no. 2S8, pp. 1164–1169, 2019, doi: 10.35940/ijrte.B1031.0882S819.
[54] B. G. Babu and R. Kapoor, “ANN based Selective Harmonic Elimination for Cascaded H-Brdige Multilevel Inverter,” in 2021 7th International Conference on Electrical Energy Systems (ICEES), 2021, pp. 183–188.
[55] M. M. A. Alakkad, D. Tunggal, D. Tunggal, M. Rasheed, D. Tunggal, and R. Omar, “Harmonic Minimization Using Artificial Neural Network Technique For CHB-ML Inverter,” in 2021 IEEE International Conference in Power Engineering Application (ICPEA), 2021, no. March, pp. 8–9.
[56] A. S. Qawasme and S. Khader, “Controlling of Multi-Level Inverter under Shading Conditions Using Artificial Neural Network,” Int. J. Energy Power Eng., vol. 14, no. 6, pp. 154–159, 2020.
[57] R. S. Tripathi, “Switching Angles Computation of Multi-Level Inverter for Electrical Vehicle Application,” in 2019 Global Conference for Advancement in Technology (GCAT), 2019, pp. 1–5.
How to Cite
PATRIANAYA MARGAYASA WIRSUYANA, Gede et al. Literature Review Metode Reduksi Harmonisa Berbasis Kecerdasan Buatan pada Multilevel Inverter. Majalah Ilmiah Teknologi Elektro, [S.l.], v. 21, n. 1, p. 53-62, july 2022. ISSN 2503-2372. Available at: <>. Date accessed: 23 apr. 2024. doi: